SCHEMATIC/PCB DESIGN with SPICE and uP SIMULATOR
The MCS8051 model models the behaviour of the industry standard 80C31/80C51 and 80C32/80C52
microcontrollers originally developed by Intel™.
The following features are supported:
Supports entire 8051 instruction set and SFRs.
Supports all I/O operations.
Supports all on-chip peripherals including the timers and UART in all their modes of operation.
Supports all interrupt modes.
Internally generated processor clock for better performance. I/O and other event timing accurate
to one clock phase.
Program and external data memory can be simulated internally to the model for maximum throughput,
or externally in order to validate the hardware design.
Provides internal consistency checks on code.
Fully integrated in to ISIS's source level debugging system and source code management system. Support
is included for source level debugging with the ASEM-51 shareware assembler and includes source, register,
and memory windows.
Virtual System Modelling